MIXED SIGNAL IC LAYOUT ENGINEER

Mixed-Signal IC Layout Engineer
Imec USA

What You Will Do

Deployment of chiplets for use in automotive applications is increasingly recognized as a pathway to improving performance, reliability, and design scalability. However, existing chiplet technologies must evolve to meet the rigorous environmental and quality standards of the automotive industry. Ensuring their viability requires robust test vehicles that evaluate the performance and reliability of advanced packaging and interconnects under automotive mission profiles.

To advance this effort, imec has partnered with faculty at the University of Michigan to develop test devices aimed at qualifying these advanced technologies. A critical component of this work is the creation of full-custom analog/mixed-signal IP and test structures that can be used to assess the long-term effects of stress on semiconductor dies.

Imec is seeking a highly skilled Mixed-Signal IC Layout Engineer to support the development of these devices. This role will be based in Ann Arbor, MI, near the University of Michigan campus, and will contribute to a growing collaboration between imec and academic researchers to push the boundaries of chiplet adoption for the automotive sector.

In this position, you will work closely with analog designers and system architects to develop and verify full-custom layouts for test structures in advanced CMOS nodes. Your contributions will directly impact the validation of new chiplet integration methods and ensure layout robustness in mission-critical environments.

Who You Are

• You have a Master’s or PhD degree in Electrical/Electronic Engineering, with a focus on microelectronics or physical design.
• You are passionate about building high-reliability analog/mixed-signal IP in support of system-level innovations.
• You have practical experience in full-custom layout, including floor planning, routing, and verification for advanced CMOS technologies (22nm/7nm/5nm/3nm).
• You are proficient with industry-standard tools for layout design, DRC/LVS checks, and parasitic extraction (e.g., Cadence Virtuoso).
• You are familiar with analog design blocks such as ADCs, ring oscillators, and temperature sensors.
• You are self-motivated, meticulous, and have a proven ability to translate design intent into layout that meets performance, area, and reliability constraints.
• You possess strong collaboration skills and are comfortable interfacing with global teams and academic partners.
• You are adaptable to new technical challenges and excited by the opportunity to work at the intersection of research and product development.
• You are open to periodic travel and short-term stays at imec headquarters in Leuven, Belgium, as part of international knowledge exchange.

This opportunity places you at the forefront of research and technology innovation in a diverse, collaborative, and internationally respected organization. Join us in shaping the future of chiplet integration for automotive systems.