Full Custom Analog Layout Engineer
What you will do
- Design Analog Layouts like PLL, BG, LVDS, IVREF etc. for various projects for Space. Application and various other Research projects at imec.
- Perform physical verifications like DRC, LVS, EM/IR and other applicable checks mentioned in the checklist for the designed blocks.
- Perform floorplan and Top-level routing till PADS keeping in mind the various power domains.
- Perform all CHIP level validations post Dummy fill necessary for the tape-out.
- Provide all the deliverables in time to meet the Layout Blocks and tape-out deadlines.
- Archival of all the reports and checklists at the end of the Project.
- Contribute towards various Layout guidelines, checklists and other documents for future Technology nodes.
What we do for you
We offer you the opportunity to join one of the world’s premier research centers in nanotechnology at its headquarters in Leuven, Belgium. With your talent, passion and expertise, you’ll become part of a team that makes the impossible possible. Together, we shape the technology that will determine the society of tomorrow.
We are proud of our open, multicultural, and informal working environment with ample possibilities to take initiative and show responsibility. We commit to supporting and guiding you in this process; not only with words but also with tangible actions. Through imec.academy, 'our corporate university', we actively invest in your development to further your technical and personal growth.
We are aware that your valuable contribution makes imec a top player in its field. Your energy and commitment are therefore appreciated by means of a competitive salary with many fringe benefits.
Who you are
- Master’s degree (or equivalent through experience) in Electronics or Electrical Engineering.
- Solid experience in designing various Analog Blocks and for Top Level integration of these blocks and signoff.
- Sound knowledge of Cadence Tools like Virtuoso XL/GXL, Voltus-FI.
- Should be aware of all parameters impacting Layout performance for deep submicron technology nodes.
- Tape-out experience in advanced process technology nodes.
- Knowledge about Radiation Hardening.
- Knowledge about svn , cliosoft or any other tool versioning tool.