Test Chip Architect

What you will do

In this position, you will be part of the imec department leading pathfinding and development of next generation technologies, looking at the most advanced devices and systems. As Test Chip Architect, you will be part of the test chip and PDK Enablement (PDKE) team. The team is responsible for the design of relevant demonstrators for technology pathfinding. Your role in the team will be to architect the test chip demonstrators that will allow assessing imec advanced technologies in various areas including new memories, photonic ICs or 3D advanced packaged systems. This includes the definition and strategy of the test chip for technology assessment, the specifications of relevant test structures, the measurement and characterization strategy, the planning of the tape-out and the follow up of all the necessary tape-out qualifications. In this role, you will need to interact with both the technology teams as well as the System/Design-Technology Co-Optimization (STCO/DTCO) teams in order to drive the test chip to success. 

Your responsibilities will include: 

• Test chip demonstrator definition and specifications 
• Tape-out planning 
• Measurement and characterization strategy 
• Tape-out qualification 
• Participation in the design of some parts in the demonstrator and final GDS delivery. 

What we do for you

We offer you the opportunity to join one of the world’s premier research centers in nanotechnology at our imec office in  Cambridge, UK. With your talent, passion, and expertise, you’ll become part of a team that makes the impossible possible. You will have the chance to interact closely with circuit designers, device experts, and process integration engineers as well as major foundry, fabless and EDA partners in imec’s eco-system. You will help drive imec’s technology and memory roadmap to build the semiconductor memory technology of the near and far away future. Together, we shape the technology that will determine the society of tomorrow.  

Who you are

• You already possess UK citizenship/working rights as we cannot sponsor visas for the UK. 
•  The ideal candidate will have a PhD or master’s degree in Electronics with at least 5 years relevant industrial or academic experience in circuit design. 
• You have solid experience in the design of circuit demonstrators and tape-out management. 
• You have a mixed-signal or digital circuit design background and brought your circuit design to hardware. 
• You are acquainted with circuit design tools, including layout and circuit simulation (Virtuoso IC design, Hspice, Calibre DRC/LVS,…). 
• You are acquainted with measurement equipment such as power supplies, voltage and current sources, SMUs, oscilloscopes, and waveform generators. You can understand their limitations and take those into account in your design for test strategy.  
• Experience with either PCB, demo board design or FPGA programming is a plus. 
• Experience with automatic, semi-automatic probe-stations or manual probe measurement and notions on probe pad layouts and probecard design is a plus. 
• You have worked in multi-disciplinary teams, ideally both interacting with hardware designers as well as EDA vendors and foundry partners. 
• You have a critical mindset, eager to explore new challenges in the future and evolve together with the changing R&D demands. 
• You are an open and constructive team player.