Emerging Memory Circuit Design Engineer

What you will do

In this position, you will be at the forefront of exploring novel non-volatile and emerging memory technologies, such as SRAM, MRAM, FeRAM, 3DDRAM, and pioneering massive sequential memory technologies. One of your primary responsibilities will be the comprehensive design of memory subarrays, including intricate stitching and detailed periphery design, to optimize for maximum efficiency and performance. Through design technology co-optimization (DTCO), you will be instrumental in shaping the memory instances and delving into the future of compute in memory and near memory architectures. Furthermore, you will play a pivotal role in hardware development and demonstration. 

Your responsibilities will include: 

• Leading the design, layout, and integration of bitcells, arrays, and focusing particularly on the complex periphery ICs of new micro-architecture concepts for various emerging technologies aimed at test-chips. 
• Assisting in the design and layout of diverse test-keys, ensuring accurate representation and functionality for hardware demonstrations of these pioneering technologies. 
• Leveraging your expertise in circuit design implementation to comprehensively evaluate the power, performance, and area of various memory technologies, ensuring the results align with practical measurements. 
• Conducting thorough pre/post silicon validation to ensure designs meet the highest standards. 
• Engaging deeply with process teams in a DTCO environment, fostering collaboration across lithography, device modeling, and process integration sectors. 

What we do for you

We offer you the opportunity to join one of the world’s premier research centers in nanotechnology at our imec office in Cambridge, UK. With your talent, passion, and expertise, you’ll become part of a team that makes the impossible possible. You will have the chance to interact closely with circuit designers, device experts, and process integration engineers as well as major foundry, fabless and EDA partners in imec’s eco-system. You will help drive imec’s technology and memory roadmap to build the semiconductor memory technology of the near and far away future. Together, we shape the technology that will determine the society of tomorrow. 

We are aware that your valuable contribution makes imec a top player in its field. Your energy and commitment are therefore appreciated by means of a market appropriate salary with many fringe benefits.  

We are committed to being an inclusive employer and proud of our open, multicultural, and informal working environment with ample possibilities to take initiative and show responsibility. We commit to supporting and guiding you in this process; not only with words but also with tangible actions. Through imec.academy, 'our corporate university', we actively invest in your development to further your technical and personal growth.  

Who you are

•  The ideal candidate will have a PhD in Electronics or a master with at least 5 years relevant industrial experience in memory design, layout, and implementation.  
• You possess basic coding capabilities. 
• You have a background of IC layout and memory design. 
• You have worked in multi-disciplinary teams, ideally both interacting with hardware designers as well as EDA vendors and foundry partners. 
• You have a critical mindset, eager to explore new challenges in the future and evolve together with the changing R&D demands. 
• Open and constructive team player. 
• Basic experience with circuit design, layout and simulation tools is a must (Virtuoso IC design, Hspice, Calibre DRC/LVS. 
• Experience is novel memory (e.g. MRAM or other) testchip design/execution/validation is a plus.