System Technology Co-Optimization for imec Technology solutions
What you will do
System-Technology Co-Optimization (STCO) is an attractive option where scaling at logic cell level will be complemented by scaling at a global system level. STCO involves the system (for example Server, board and CPU/SoC) to be disintegrated, and subsequently reintegrated more densely or efficiently by using imec integration technologies. This can be enabled by leveraging 3D heterogeneous integration, bringing on-board interconnect and components into one package or chip stack. Another option is integrating different types of devices, optimized for different functionality monolithically in a single wafer, e.g. combining power or RF components with scaled dense logic devices.
The fundamental challenge is STCO is to find useful system level modules that can benefit immensely by enablement novel integration with next generation of logic and memory resulting optimization of power, cost and performance for targeted application domains. To explore such an optimization path, a framework needs to be built that can capture the benefits of such technology solutions at a system level –providing further knobs for continuing the scaling path:
- The goal is to have a system simulation framework that can help to explore the benefits of STCO-driven technology solutions at a system level. No solution has been found for that yet in literature.
- Such system level optimizations are inherently application specific. In order to achieve a large enough market volume to motivate the huge NRE costs for novel technology, the application domain where a STCO solution is focused on should be sufficiently broad. The framework should be able to cover multiple application domains, ranging from the typical multi-core server systems, to dedicated heterogenous systems with e.g. AI accelerators or emerging compute platforms like AR/VR headsets.
- It will be crucial to strike the right balance between modeling detail and flexibility. The key components in a system should be modeled, but only to the extent needed to show their interaction and the benefits of new integration technologies. Detailed analysis of specific technological solutions for logic cores, memories and interconnect and I/O is already being done at imec, which can serve as input to this framework.
What we do for you
We offer you the opportunity to join one of the world’s premier research centers in nanotechnology at its headquarters in Leuven, Belgium. With your talent, passion and expertise, you’ll become part of a team that makes the impossible possible. Together, we shape the technology that will determine the society of tomorrow.
We are proud of our open, multicultural, and informal working environment with ample possibilities to take initiative and show responsibility. We commit to supporting and guiding you in this process; not only with words but also with tangible actions. Through imec.academy, 'our corporate university', we actively invest in your development to further your technical and personal growth.
We are aware that your valuable contribution makes imec a top player in its field. Your energy and commitment are therefore appreciated by means of a competitive salary with many fringe benefits.
Who you are
- You have a Ph.D. degree in Electrical or Computer Engineering
- We need your experience with logic synthesis and computer architecture
- We are looking for your knowledge in advanced CMOS and memory technologies
- We value your experience with industry-standard EDA tools like Cadence/Synopsys, specifically system modeling tools and languages: SystemC, Platform Architect or similar.
- We are looking for a good team player and your ability to work independently
- You have excellent English communication skills and enjoy working in a multicultural environment
This postdoctoral position is funded by imec through KU Leuven. Because of the specific financing statute which targets international mobility for postdocs, only candidates who did not stay or work/study in Belgium for more than 24 months in the past 3 years can be considered for the position (short stays such as holiday, participation in conferences, etc. are not taken into account).