/RISC-V micro-architecture codesign Researcher

RISC-V micro-architecture codesign Researcher

Research & development - Leuven | More than two weeks ago

Are you passionate about the opportunity to have a real impact on the hardware and software that underlies the most exciting trends in modern computing in the world? Would you love to work in a talented, multi-disciplinary team of architects and software engineers? Then get in touch!

RISC-V Micro-architecture Codesign Researcher

What you will do

The Compute System Architecture (CSA) unit at imec desires to build zeta-scale AI/HPC hardware and software solutions co-designed. We are backed by a broad in-house R&D expertise, creating a new AI computing paradigm that will move the industry forward for many years to come. We are looking for talented researchers and engineers with varied skillsets advancing the art of high-performance system codesign. Our future colleague will channel creativity to contribute in cross-spectrum flow and methodology, working closely with a team of software researchers, micro-architects and circuit designers. 
We are continuously innovating across the stack from applications to architecture to technology, to build some of the most complex and best performing compute systems in the world. In this role, you develop new innovative RISC-V CPUs, working with a team of architects. You apply your skills to Propose innovative solutions that can be implemented in HW with the best PPA characteristics and work with architects and analytical modelling teams for trade-off studies and communicate pros/cons of microarchitecture enhancements.  Furthermore, you develop an understanding of state-of-the-art techniques for at least one processor functional block. Analysing CPU performance when integrated into a larger system and ensure model functionality and accuracy in that environment is also part of your role.

What we do for you

We offer you the opportunity to join one of the world’s premier research centers in nanotechnology at its headquarters in Leuven, Belgium. With your talent, passion and expertise, you’ll become part of a team that makes the impossible possible. Together, we shape the technology that will define the society of tomorrow.

We are committed to being an inclusive employer (http://www.imec-int.com/en/careers#diversity) and proud of our open, multicultural, and informal working environment with ample possibilities to take initiative and show responsibility. In everything we do, your future colleagues are guided by the imec values of passion, excellence, connectedness and integrity. We commit to supporting and guiding you in this process; not only with words but also with tangible actions. Through imec.academy, 'our corporate university', we actively invest in your development to further your technical and personal growth. 

We are aware that your valuable contribution makes imec a top player in its field. Your energy and commitment are therefore appreciated by means of a market appropriate salary with many fringe benefits.

Who you are

Essential skills
  • Master’s or Doctoral degree in Computer Engineering or related field with experience relevant to CPU architecture or micro-architecture modeling and workload analysis
  • Experience with modern, high-performance CPU architecture and microarchitecture.
  • Experience with performance modeling, performance analysis, and workload characterization.
  • Experience with C/C++ and scripting languages (e.g., Python).
  • You have an analytical mindset and think at an abstract level, yet you have a hands-on attitude and like to dive deep into a problem.
  • Constructive attitude, able to convince others and always prepared to listen and learn from others when solving a problem.
A great candidate is familiar with one or more of these:
  • Good understanding of modern ISA and microprocessor implementation techniques.
  • Deep understanding of systems architecture: CPU, memory subsystem, system software components would be helpful
  • Familiarity and experience with RISC-V Architecture.
  • Design knowledge of RISC-V RV64 ISA and custom instruction set design.
  • Design knowledge of CPU Principles of Branch Predictors and register renaming.
  • Design knowledge of CPU Principles of Out of order issues and out of order execution.
  • Exposure to SystemC/TLM, Sparta is a strong plus.
  • Hands on experience developing performance simulators, cycle accurate/approximate models for performance analysis is a strong plus.