Research & development - Leuven | More than two weeks ago
Magnetic random access memory (MRAM) has made extensive progresses to be a working memory solution with nonvolatility, high speed and low power consumption, exploiting spin-transfer torque (STT) as the key ingredient for fully electric operation. However, STT writing requires a substantial amount of spin-polarized currents flowing through the oxide barrier of a magnetic tunnel junction (MTJ), which ends up in the limitation to reduce the power consumption. Such intense tunneling current can also degrade the barrier of magnetic tunnel junctions (MTJ) to affect the reliability of memory cells. Moreover, STT writing can hardly achieve the speed faster than GHz regarding the general dynamics of magnetization in ferromagnetic layer.
One method to make advances in MRAM is spin-orbit torque (SOT) using spin Hall effect (SHE), where in-plane charge current flowing in a nonmagnetic layer generates a vertical spin current, leading to the magnetization reversal of the adjacent magnetic layer . Voltage-controlled magnetic anisotropy (VCMA) is another promising method to enable ultra-low power writing operations . It reduces the interfacial perpendicular magnetic anisotropy (PMA) with an electric field, or a voltage across the barrier in MTJ. Switching of magnetization by eliminating the PMA using voltage pulse without current is the key aspect of VCMA. It can also be combined with other writing scheme to be more efficient .
As the novel writing scheme of MRAM, VCMA switching has distinctive characteristics compared to the conventional STT switching. The VCMA writing via precessional re-orientation of the free layer leads to very sharp switching with ~ 1ns pulses. Ideally zero tunneling current is needed for writing with VCMA effect. Realistically however, it is required to allow a certain amount of current to flow through the MTJ to read the information with tunneling magnetoresistance, and the current can induce unwanted influences. Thus, the VCMA operation of MTJs with various conditions should be explored for optimum design of the device.
As part of this postdoctoral research, your goal will be to establish fundamental links between the switching process and the device reliability parameters such as the write-error rate, impact of high retention and dielectric breakdown. It is also expected that the insight you gain allows you to propose advanced reading/writing schemes to improve reliability, as well as guidance for the free layer, dielectric or MRAM stack.
 I. M. Miron et al., Nature 476, 189 (2011)
 T. Maruyama et al., Nat. Nanotechnol. 4, 158 (2009)
 H. Yoda et al., IEEE IMW (2017)
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