Coming events
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IMEC’s TAD team will present
VAM at the ESSDERC Variability Workshop on 19th September
2008. see also: http://www.nanocmos.ac.uk/essderc/programme.php
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Keep your agendas
open on 25 Nov 2008 for the annual TAD-CALIT Symposium on Technology Aware
Design. Call for papers and venue
follows on www.imec.be/tad/2008calit. Minutes of
the previous edition (13 Nov 2007) are on www.imec.be/tad/2007calit. |
Technology Aware Design
“Technology-Aware Design”
(TAD) is IMEC’s name for an activity that started back in 2001 as “SLI” (system
level integration). It anticipates the end of the traditional “happy” scaling
paradigm, where CMOS technology and design evolved on completely separate
tracks. Today both sides (design and technology) are confronted with the need
to understand the other in order to overcome new scaling induced issues. The
TAD program pursues analysis and solutions for these scaling induced problems.
TAD is divided in two
tracks, corresponding to:
* Analysis focus:
centered around “VAM”, Variability & Reliability Aware Modeling
* Solution focus:
specific focus on run-time countermeasures using Fine-grained, Standardized
“Knobs”, “Monitors” and Control algorithms (SKM)
